Neuromorphic Integrated Circuits (NIC26)

• 1. Shantanu Chakrabartty, Washington University
• 2. Chetan Singh Thakur, Indian Institute of Science (IISc)

The team will investigate cutting-edge neuromorphic designs, components, and devices that can offer a performance advantage over traditional computing platforms such as CPUs and GPUs, with a focus on applications like combinatorial optimization, stochastic simulations, and AI-driven tasks.

We aim to leverage key neuromorphic principles, such as event-based asynchronous processing, mixed-signal computing, stochastic computation, and sparsity-aware design, to develop the next generation of neuromorphic architectures. We will assess how optimization strategies and inherent dynamics can be effectively integrated into neuromorphic hardware, circuits, and systems.

• Asynchronous Neuromorphic Accelerators
• Analog/Mixed Neuromorphic Accelerators
• Neuromorphic Hardware-Algorithm co-design
• Event-based sparsity aware architecture

• Ising implementation using the Processing-in-Interconnect (π²) framework for mapping combinatorial optimization problems onto neuromorphic substrates.
• Scaling neuromorphic Ising problems across multiple FPGA platforms for solving complex combinatorial tasks.
• Extending the π² framework for event-based datasets, enabling spike/event-driven encoding of optimization and learning tasks for asynchronous neuromorphic hardware.
• More Project Ideas will be added to this list soon.